GUNDALA, S. .; KUMARI, R. . Design of Efficient 32-bit Low power Variable Latency Parallel Prefix BrentKung Adder. International Journal of Technical Innovation in Modern Engineering & Science, [S. l.], v. 5, n. 5, p. 485–492, 2019. Disponível em: https://ijtimes.com/index.php/ijtimes/article/view/2414. Acesso em: 12 mar. 2025.