PERFORMANCE ANALYSIS OF CARRY SKIP ADDER USING CNTFET AND FINFET

Authors

  • T. Vikhitha M.Tech Student, Department of Electronics and Communication Engineering, VNRVJIET,
  • Dr. L. Padma Sree Professor, Department of Electronics and Communication Engineering, VNRVJIET,

Keywords:

Carry Skip Adder, CNTFET, FinFET, CMOS, HSPICE tool

Abstract

In this paper, Carry Skip Adder is segregated into many blocks like 1-bit Full Adder, AND gate and MUX. In the place of 1-bit full adder different Full adders using 20T, 16T, 14T, 10T, 9T, and 8T are replaced and analyzed. Propagation delay, Static and dynamic power are the major parameters considered while designing the adders. The results show that the time taken is less in carry propagation over successive stages. Due to less transistor count, Carry Skip Adder has less area, less delay and low power dissipation
compared to other adders. The performance analysis is done in CMOS, FinFET and CNTFET in 20nm technology with supply voltage of 0.9v and simulation is done by using Synopsys HSPICE tool.

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Published

2018-08-22

How to Cite

Vikhitha, T. ., & Sree, D. L. P. . (2018). PERFORMANCE ANALYSIS OF CARRY SKIP ADDER USING CNTFET AND FINFET. International Journal of Technical Innovation in Modern Engineering & Science, 4(8), 1020–1029. Retrieved from https://ijtimes.com/index.php/ijtimes/article/view/1167

Issue

Vol. 4 No. 8 (2018): Vol. 4 No. 8: Volume 4 Issue 8 (August-2018)

Section

Articles