Design and Analysis of 2/3 Prescaler using TSPC DFF at 180nm technology

Authors

  • Jasbir Kaur VLSI (Electronic and Communication Dept.), Punjab Engineering College, Chandigarh, jasbirkaur70@yahoo.co.in
  • Mohit Sharma VLSI (Electronic and Communication Dept.), Punjab Engineering College, Chandigarh, mohit8293@gmail.com

Keywords:

TSPC (True Single Phase Clock), DFF(D Flip Flop), Switching Power, Short Circuit Power

Abstract

A lot of variations are seen in present circuits because of intensive scaling. In this paper 2/3 prescalers is designed and its working operation has been discussed. This work compares conventional 2/3 prescalers circuits and then identifies the circuit on the basis of speed and power taken into consideration. In this paper the total power consumed by this circuit and the maximum operating frequency of 2/3 prescalers circuits are discussed. This modified circuit works at a maximum frequency of 7.41GHz and power consumption is 2.40mW and 2.58mW in divide by 2 and divide by 3 operation respectively. Power supply voltage given is 2V and input signal voltage is 1.2V The entire design has been done in 180 nm technology using cadence tool.

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Published

2018-07-14

How to Cite

Kaur, J. ., & Sharma, M. . (2018). Design and Analysis of 2/3 Prescaler using TSPC DFF at 180nm technology. International Journal of Technical Innovation in Modern Engineering & Science, 4(7), 134–138. Retrieved from https://ijtimes.com/index.php/ijtimes/article/view/897

Issue

Vol. 4 No. 7 (2018): Vol. 4 No. 7: Volume 4 Issue 7 (July-2018)

Section

Articles