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Vol. 12  No. 2 (2026) · Research Article

A Novel Model Predictive Control Method for Induction Motor Drive Fed by a Three-Level Diode-Clamped Indirect Matrix Converter

Arman Farhadi
Department of Electrical and Computer Engineering, K. N. Toosi University of Technology, Tehran, Iran , Iran

Amir Akbari
Department of Electrical and Computer Engineering, K. N. Toosi University of Technology, Tehran, Iran , Iran

Ali Zakerian
Department of Electrical and Computer Engineering, K. N. Toosi University of Technology, Tehran, Iran , Iran

Mohammad Tavakoli Bina
Department of Electrical and Computer Engineering, K. N. Toosi University of Technology, Tehran, Iran , Iran

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Received 05 November 2025; received in revised form 17 May 2026; accepted 14 June 2026

📅 Published: June 2026

Keywords: model predictive control, three-level matrix converter, induction motor, switching frequency, torque ripple

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Abstract

In this paper, an improved model predictive control method is proposed to drive an induction motor fed by a three-level matrix converter. The main objective of this paper is to present a novel method to increase the switching frequency at a constant sampling time. Also, it is analytically discussed that increasing the switching frequency not only can decrease the motor current ripples, but it can also significantly reduce its torque ripples. Finally, this study demonstrates that reducing the motor current ripple will improve the quality of the supply current. To be the accurate model and validate the motor drive system, a co-simulation method, which is a combination of FLUX and MATLAB software packages, is employed to find the simulation results. The findings indicate that the proposed method diminishes the THD of the supply current up to 26% approximately. Furthermore, increasing the switching frequency results in the torque ripple reduction by up to 10% almost.

How to Cite

Arman Farhadi, Amir Akbari, Ali Zakerian, Mohammad Tavakoli Bina, “A Novel Model Predictive Control Method for Induction Motor Drive Fed by a Three-Level Diode-Clamped Indirect Matrix Converter,” International Journal of Technical Innovation in Modern Engineering & Science, vol. 12, no. 2, pp. 46-60, June 2026.

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