LOW COST FPGA DEVICE SELECTION FOR REAL TIME VIDEO SIGNAL PROCESSING
Dr. R. Prakash Rao
Associate Professor, Electronics and Communication Engineering, Matrusri Engineering College, #16-1-486, Saidabad, Hyderabad-500059, India. , IN
Keywords: FPGA, video processing, deinterlacing, Verilog HDL, hardware design flow
Abstract
This work depicts the utilization of present day low price Field Programmable Gate Arrays (FPGAs) for real time broadcast video processing. Capabilities of selected device family (Altera Cyclone IV) are discussed with regard to video processing. Example IP core deinterlacer is designed in Verilog HDL and the design flow is described. The IP core is implemented in real hardware system. The overall hardware system is described together with individual FPGA components providing video input/output and other I/O functions.
How to Cite
References
NA